Thought Wafer Processing Implications of Co-Packaged Optics and AI Integration

Subheadline: As AI demand pushes data centers to their limits, the semiconductor industry is abandoning traditional pluggable modules for integrated Co-Packaged Optics, forcing a radical evolution in 300mm wafer manufacturing and supply chain collaboration.

A Generational Shift in Interconnect Technology

The rapid ascent of Artificial Intelligence (AI) has pushed data center infrastructure to a critical breaking point. To meet the voracious bandwidth requirements of high-performance computing (HPC), the industry is undergoing a strategic shift away from traditional “pluggable” optical modules toward Co-Packaged Optics (CPO). This is not merely a component swap; it represents a fundamental evolution toward high-speed, low-power, and short-range connections that are physically closer to the processing heart of the server.

Central to this transition is the move toward Full Heterogeneous Integration. In this new architecture, passive Silicon (Si) Photonics used for waveguides and interconnects and active Compound Semiconductors, such as Indium Phosphide (InP) and Gallium Arsenide (GaAs), are combined onto a single substrate. Leading equipment providers anticipated this pivot; in June 2025, KLA’s SPTS division officially opened a major factory expansion to support the burgeoning demand for photonics wafer processing. This technical foundation enabled the industry to move from discrete, modular optics to a highly integrated silicon-and-light ecosystem that is now defining the market in 2026.

From Pluggable to Integrated: The Context of the Optical Engine

For decades, the “pluggable” era thrived on a segregated supply chain where technical competencies were strictly partitioned. Optical specialists handled the light, and silicon fabs handled the logic. However, as we approach the 1.6T transceiver era, this separation is reaching its physical limits. The signal integrity loss and power consumption of moving data between discrete modules are no longer sustainable.

To achieve the necessary efficiency, the industry is merging the two primary branches of “Discrete Photonics”:

• Passive Optical Devices: Consisting of dielectric and Silicon Photonics (SiPho) waveguides processed on 8-inch or 12-inch Silicon-on-Insulator (SOI) wafers. These serve as the “wiring” for light in Datacom and HPC environments.
• Active Optical Devices (Optoelectronics): The light sources, including InP-based Edge Emitting Lasers (EELs) and GaAs-based VCSELs. Historically, these were niche components for long-haul telecom or consumer sensing like smartphone face recognition.

The modern CPO architecture represents “A + B” the integration of active chiplets directly onto SiPho substrates. This creates a high-performance “optical engine” inside the package, eliminating the inefficiencies of the old pluggable model.

Market Bifurcation: The Datacom Surge and the Decline of Legacy Telecom

The photonics market is currently experiencing a sharp divergence. Reports from March 2026 indicate that industry giants like Coherent and Lumentum are navigating a “bifurcation” of demand. While legacy telecommunications segments show signs of stagnation, the “AI driver” has created an explosive surge in Datacom requirements.

Market projections for 2027 highlight the scale of this realignment:

• VCSELs: Once dominated by the smartphone market, VCSELs are pivoting toward data centers, with Datacom expected to account for 50% of the market by 2027.
• InP EELs: Historically the backbone of long-haul Telecom, 65% of InP demand is projected to come from Datacom by 2027.

While investors in March 2026 have shown some caution regarding financing terms, the underlying demand for AI-driven infrastructure remains high. This transition necessitates a move toward larger wafer sizes and more standardized, high-volume manufacturing to satisfy Nvidia-driven infrastructure goals.

The 300mm Imperative: Why Compound Fabs Must Scale or Die

As compound semiconductors move from niche applications to the core of the data center, the move to 300mm wafer processing has become a strategic necessity. This shift improves manufacturability and allows for the seamless integration of SiPho, compound layers, and CMOS logic. However, processing CPO at 300mm forces fabs to master materials and requirements that were once considered CMOS “heresy.”

The technical “So What?” of this pivot centers on two critical manufacturing hurdles:

1. The CVD Hydrogen Trade-off: To minimize optical loss, waveguides require NH3-free Silicon Nitride (SiNx) films. While LPCVD can achieve low hydrogen content, it requires temperatures of ~800°C far too high for many integrated stacks. PECVD solutions (like those from SPTS) allow for lower thermal budgets but naturally contain more hydrogen. Fabs are now forced to adopt alternative precursors to reach the “NH3-free” goal without destroying the underlying device layers.
2. Zero-Scallop Etching: Traditional “Bosch” switched processes, which rely on SF6/C4F8 cycling, leave “scallops” (ripples) of up to 100nm on sidewalls. For optical waveguides, this creates unacceptable scattering. Fabs must now transition to specialized continuous etching processes to achieve ~0nm scallop smoothness on materials like Lithium Niobate (LiNbO3), Titanium Dioxide (TiO2), and Niobium Pentoxide (Nb2O5). These materials are being adopted specifically for their high refractive index (RI), which is essential for next-generation modulators.

Heterogeneous Integration: Bridging the 65x Revenue Gap

In the CPO era, advanced packaging is the only viable path to integration. This has fundamentally altered the power dynamics of the supply chain. We are seeing a move from a “Normal” linear supply chain to one requiring intense technical co-working between “dissimilar” companies.

The scale of this challenge is reflected in the revenue gap: $100B+ silicon foundries must now collaborate deeply with compound semiconductor specialists with revenues in the $2-5B range. This is a power imbalance of up to 65x, yet the foundry’s success depends entirely on the specialist’s ability to deliver the optical engine.

Two primary integration paths are being utilized:

• Thermo-compression Bonding: Utilizing Via Reveal Etch, UBM metals for RDL, and precision silicon micro-machining for fiber alignment.
• Hybrid Bonding: This more advanced path utilizes Plasma Dicing and specialized CVD layers, specifically SiCN (using the BonDi process) for the bond layer and TEOS gap-fill (Di-Fill) to manage the spaces between die.

The Ecosystem in Action: Strategic Alliances and Collaborations

The era of segregated technical know-how is over. The complexity of CPO has forced high-level corporate partnerships that merge optoelectronics expertise with world-class silicon manufacturing.

Evidence of this “joint invention” model is everywhere:

• Nvidia’s SpectrumX: This CPO-based network switch was developed through a massive collaboration between Nvidia, TSMC, SPIL, Coherent, and Lumentum.
• TowerJazz & Coherent: A Joint Development Program (JDP) established in late 2024 is now yielding 1.6Tb/s optical transceivers, proving that foundry/laser specialist partnerships are the new industry standard.
• Research Milestones: Scalability has been proven by research leaders, with imec demonstrating GaAs Edge Emitting Lasers on 200mm SOI and IQE producing 8-inch GaAs-on-Silicon VCSEL wafers. These milestones served as the “proof of concept” that justified the industry’s pivot toward 300mm.

Conclusion: The Roadmap to 1.6T and Beyond

The transition from pluggable to Co-Packaged Optics is the inescapable result of the AI bandwidth explosion. As we push toward 1.6T speeds and beyond, the industry’s success will be measured by its ability to move light as effectively as it moves electrons. Three critical takeaways define this era:

1. AI is the Absolute Catalyst: The bandwidth and power constraints of AI are forcing the optical engine directly into the package, ending the era of partitioned optics.
2. Wafer Processing is Transforming: 300mm manufacturing now encompasses “exotic” materials like Lithium Niobate and requires a total mastery of continuous etch and low-hydrogen CVD processes.
3. Collaboration is Non-Negotiable: The CPO supply chain requires unprecedented co-working between silicon giants and compound specialists to bridge the 65x revenue and competency gap.

The next decade of semiconductor manufacturing will be defined by those who master heterogeneous integration. As light and silicon merge on the 300mm wafer, the “Great Optical Pivot” will determine the winners in the race for the future of high-performance computing.